Renesas Stereo Amplifier 3SK318 User Guide

3SK318  
Silicon N-Channel Dual Gate MOS FET  
UHF RF Amplifier  
REJ03G0819-0200  
(Previous ADE-208-600)  
Rev.2.00  
Aug.10.2005  
Features  
Low noise characteristics;  
(NF= 1.4 dB typ. at f= 900 MHz)  
Excellent cross modulation characteristics  
Capable low voltage operation; +B= 5V  
Outline  
RENESAS Package code: PTSP0004ZA-A  
(Package name: CMPAK-4)  
2
3
1. Source  
2. Gate1  
3. Gate2  
4. Drain  
1
4
Note: Marking is “YB–“.  
Rev.2.00 Aug 10, 2005 page 1 of 7  
 
3SK318  
Maximum Channel Power  
Dissipation Curve  
Typical Output Characteristics  
20  
16  
12  
8
200  
150  
100  
50  
V
= 1.7 V  
G1S  
VG2S = 3 V  
1.6 V  
1.5 V  
1.4 V  
1.3 V  
1.2 V  
1.1 V  
1.0 V  
0.9 V  
4
0.8 V  
8
0
0
2
4
6
10  
50  
100  
150  
200  
Ambient Temperature Ta (°C)  
Drain to Source Voltage VDS (V)  
Drain Current vs.  
Gate2 to Source Voltage  
Drain Current vs.  
Gate1 to Source Voltage  
20  
16  
12  
8
20  
16  
12  
8
V
DS = 3.5 V  
2.0 V  
VDS = 3.5 V  
2.5 V  
1.8 V  
1.6 V  
2.0 V  
1.4 V  
1.5 V  
1.2 V  
VG1S = 1.0 V  
4
4
VG2S = 1.0 V  
0
0
1
2
3
4
5
1
2
3
4
5
Gate2 to Source Voltage VG2S (V)  
Gate1 to Source Voltage VG1S (V)  
Forward Transfer Admittance  
vs. Gate1 Voltage  
Power Gain vs. Drain Current  
25  
20  
15  
10  
5
30  
24  
18  
12  
6
VDS = 3.5 V  
VG2S = 3 V  
2.5 V  
2 V  
1.5 V  
VDS = 3.5 V  
V
G2S = 3 V  
1 V  
1.2  
f = 900 MHz  
0
0
5
10  
15 20  
25  
0.4  
0.8  
1.6  
2.0  
Drain Current ID (mA)  
Gate1 to Source Voltage VG1S (V)  
Rev.2.00 Aug 10, 2005 page 3 of 7  
 
3SK318  
Noise Figure vs. Drain Current  
VDS = 3.5 V  
Power Gain vs. Drain to Source Voltage  
25  
5
4
3
2
1
VG2S = 3 V  
20  
15  
10  
5
f = 900 MHz  
VG2S = 3 V  
D = 10 mA  
f = 900 MHz  
I
0
0
5
10  
15  
20  
25  
2
4
6
8
10  
Drain to Source Voltage VDS (V)  
Drain Current ID (mA)  
Noise Figure vs. Drain to Source Voltage  
Power Gain vs. Gate2 to Source Voltage  
25  
5
VG2S = 3 V  
ID = 10 mA  
f = 900 MHz  
VDS = 3.5 V  
f = 900MHz  
20  
15  
10  
5
4
3
2
1
0
0
1
2
3
4
5
2
4
6
8
10  
Drain to Source Voltage VDS (V)  
Gate2 to Source Voltage VG2S (V)  
Noise Figure vs. Gate2 to Source Voltage  
5
VDS = 3.5 V  
f = 900MHz  
4
3
2
1
0
1
4
2
3
5
Gate2 to Source Voltage VG2S (V)  
Rev.2.00 Aug 10, 2005 page 4 of 7  
 
3SK318  
S11 Parameter vs. Frequency  
S21 Parameter vs. Frequency  
Scale: 1 / div.  
1
90°  
.8  
1.5  
.6  
60°  
120°  
2
.4  
3
4
5
30°  
150°  
.2  
10  
.2  
.4 .6 .8 1  
1.5 2 3 4 5 10  
0
180°  
0°  
–10  
–5  
–4  
–.2  
–30°  
–150°  
–3  
–.4  
–2  
–60°  
–.6  
–120°  
–1.5  
–.8  
–1  
–90°  
Test Condition :  
V
DS = 3.5 V , VG2S = 3 V  
Test Condition :  
V
DS = 3.5 V , VG2S = 3 V  
ID = 10mA  
ID = 10mA  
50 to 1000 MHz (50 MHz step)  
50 to 1000 MHz (50 MHz step)  
S12 Parameter vs. Frequency  
S22 Parameter vs. Frequency  
Scale: 0.002 / div.  
1
90°  
.8  
1.5  
60°  
.6  
120°  
2
.4  
3
30°  
150°  
4
5
.2  
10  
.2  
.4 .6 .8 1  
1.5 2 3 4 5 10  
0
180°  
0°  
–10  
–5  
–4  
–.2  
–30°  
–150°  
–3  
–.4  
–2  
–60°  
–120°  
–.6  
–1.5  
–.8  
–1  
–90°  
Test Condition :  
Test Condition :  
VDS = 3.5 V , VG2S = 3 V  
ID = 10mA  
VDS = 3.5 V , VG2S = 3 V  
ID = 10mA  
50 to 1000 MHz (50 MHz step)  
50 to 1000 MHz (50 MHz step)  
Rev.2.00 Aug 10, 2005 page 5 of 7  
 
3SK318  
S Parameter  
(VDS = 3.5V, VG2S = 3V, ID = 10mA, Zo = 50)  
Freq.  
S11  
S21  
S12  
S22  
(MHz)  
50  
MAG.  
1.000  
0.998  
0.997  
0.994  
0.994  
0.986  
0.978  
0.972  
0.969  
0.954  
0.955  
0.941  
0.932  
0.924  
0.919  
0.905  
0.896  
0.884  
0.880  
0.866  
ANG.  
–2.8  
MAG.  
2.41  
2.41  
2.39  
2.38  
2.37  
2.35  
2.30  
2.28  
2.26  
2.23  
2.19  
2.17  
2.14  
2.09  
2.07  
2.03  
2.00  
1.96  
1.93  
1.89  
ANG.  
176.3  
171.9  
167.6  
163.7  
159.8  
155.5  
151.4  
147.6  
143.6  
140.0  
135.9  
132.2  
128.6  
125.0  
121.5  
117.9  
114.7  
110.4  
107.1  
103.8  
MAG.  
ANG.  
89.1  
88.5  
80.7  
76.6  
79.1  
75.4  
75.0  
78.0  
71.6  
69.5  
71.5  
70.6  
69.0  
71.4  
69.0  
68.9  
74.2  
75.5  
77.8  
82.1  
MAG.  
0.999  
0.996  
0.996  
0.994  
0.991  
0.988  
0.983  
0.980  
0.976  
0.971  
0.966  
0.960  
0.955  
0.948  
0.942  
0.937  
0.930  
0.923  
0.917  
0.910  
ANG.  
–2.2  
0.00068  
0.00176  
0.00223  
0.00303  
0.00365  
0.00414  
0.00484  
0.00533  
0.00588  
0.00617  
0.00666  
0.00672  
0.00694  
0.00709  
0.00689  
0.00699  
0.00644  
0.00633  
0.00585  
0.00605  
100  
150  
200  
250  
300  
350  
400  
450  
500  
550  
600  
650  
700  
750  
800  
850  
900  
950  
1000  
–5.8  
–4.5  
–9.1  
–6.7  
–12.2  
–15.1  
–18.5  
–21.3  
–24.1  
–27.0  
–29.7  
–32.8  
–35.7  
–38.3  
–41.3  
–44.1  
–46.9  
–49.2  
–52.4  
–54.7  
–57.7  
–8.7  
–11.0  
–13.2  
–15.3  
–17.4  
–19.6  
–21.7  
–23.7  
–25.6  
–27.8  
–29.9  
–31.8  
–33.8  
–35.8  
–37.6  
–39.8  
–41.9  
Rev.2.00 Aug 10, 2005 page 6 of 7  
 
3SK318  
Package Dimensions  
JEITA Package Code  
SC-82A  
RENESAS Code  
Package Name  
MASS[Typ.]  
0.006g  
PTSP0004ZA-A  
CMPAK-4(T) / CMPAK-4(T)V  
D
A
e2  
B
e
Q
b1  
c
B
E
HE  
LP  
Reference  
Symbol  
Dimension in Millimeters  
Min  
0.8  
0
Nom  
Max  
1.1  
0.1  
1.0  
L
A
A
A
A
1
2
3
A
A
L1  
0.8  
0.9  
0.25  
0.32  
0.42  
0.3  
A3  
b
b
0.25  
0.35  
0.4  
0.5  
x
S
A
M
e2  
e
b
b
b
1
2
3
0.4  
c
0.1  
0.13  
0.11  
2.0  
0.15  
c
1
A2  
A1  
A
l1  
D
E
e
1.8  
2.2  
1.15  
1.25  
0.65  
1.35  
e
0.6  
2.1  
2
b5  
y
S
H
1.8  
0.3  
0.1  
0.2  
2.4  
0.7  
e1  
E
S
L
L
0.5  
1
b
b1  
b3  
L
0.6  
P
l1  
b
2
x
0.05  
0.05  
0.45  
0.55  
c1  
c
1
y
b
4
5
1
c
c
b
e
b4  
Pattern of terminal position areas  
1.5  
0.2  
l
0.9  
1
A-A Section  
B-B Section  
Q
Ordering Information  
Part Name  
Quantity  
Shipping Container  
φ 178 mm Reel, 8 mm Emboss Taping  
3SK318YB-TL-E  
3000  
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of  
production before ordering the product.  
Rev.2.00 Aug 10, 2005 page 7 of 7  
 
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
Keep safety first in your circuit designs!  
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble  
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.  
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary  
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.  
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application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.  
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diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.  
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The information described here may contain technical inaccuracies or typographical errors.  
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.  
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor  
home page (http://www.renesas.com).  
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to  
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes  
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RENESAS SALES OFFICES  
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.  
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Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501  
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© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.  
Colophon .3.0  
 

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